2n7002 doc.# dsfp-2n7002 c062813 drain source gate features ? free from secondary breakdown ? low power drive requirement ? ease of paralleling ? low c iss and fast switching speeds ? excellent thermal stability ? integral source-drain diode ? high input impedance and high gain applications ? motor controls ? converters ? amplifers ? switches ? power supply circuits ? drivers (relays, hammers, solenoids, lamps, memories, displays, bipolar transistors, etc.) general description the supertex 2n7002 is an enhancement-mode (normally- off) transistor that utilizes a vertical dmos structure and supertexs well-proven silicon-gate manufacturing process. this combination produces a device with the power handling capabilities of bipolar transistors, and the high input impedance and positive temperature coeffcient inherent in mos devices. characteristic of all mos structures, this device is free from thermal runaway and thermally-induced secondary breakdown. supertexs vertical dmos fets are ideally suited to a wide range of switching and amplifying applications where very low threshold voltage, high breakdown voltage, high input impedance, low input capacitance, and fast switching speeds are desired. absolute maximum ratings parameter value drain-to-source voltage bv dss drain-to-gate voltage bv dgs gate-to-source voltage 30v operating and storage temperature -55c to +150c absolute maximum ratings are those values beyond which damage to the device may occur. functional operation under these conditions is not implied. continuous operation of the device at the absolute rating level may affect device reliability. all voltages are referenced to device ground. n-channel enhancement-mode vertical dmos fets product marking 702w w = code for week sealed = ?green? packagin g to-236ab (sot-23) to-236ab (sot-23) pin confguration package may or may not include the following marks: si or ordering information part number package option packing 2N7002-G to-236ab (sot-23) 3000/reel product summary bv dsx /bv dgs (v) r ds(on) (max) i d(on) (min) 60v 7.5 500ma -g denotes a lead (pb)-free / rohs compliant package. contact factory for wafer / die availablity. devices in wafer / die form are lead (pb)-free / rohs compliant. typical thermal characteristics package ja to-236ab (sot-23) 203 o c/w * mounted on fr4 board; 25mm x 25mm x 1.57mm supertex inc. supertex inc. www .supertex.com
2 2n7002 doc.# dsfp-2n7002 c062813 electrical characteristics (t a = 25c unless otherwise specifed) sym parameter min typ max units conditions bv dss drain-to-source breakdown voltage 60 - - v v gs = 0v, i d = 10a v gs(th) gate threshold voltage 1.0 - 2.5 v v gs = v ds , i d = 250a ?v gs(th) change in v gs(th) with temperature - - -5.5 mv/ o c v gs = v ds , i d = 250a i gss gate body leakage current - - 100 na v gs = 20v, v ds = 0v i dss zero gate voltage drain current - - 1.0 a v gs = 0v, v ds = max rating - - 500 v gs = 0v, v ds = 0.8max rating, t a = 125 o c i d(on) on-state drain current 500 - - ma v gs = 10v, v ds = 25v r ds(on) static drain-to-source on-state resistance - - 7.5 v gs = 5.0v, i d = 50ma - - 7.5 v gs = 10v, i d = 500ma ?r ds(on) change in r ds(on) with temperature - - 1.0 %/ o c v gs = 10v, i d = 500ma g fs forward transconductance 80 - - mmho v ds = 25v, i d = 500ma c iss input capacitance - - 50 pf v gs = 0v, v ds = 25v, f = 1.0mhz c oss common source output capacitance - - 25 c rss reverse transfer capacitance - - 5.0 t (on) turn-on time - - 20 ns v dd = 30v, i d = 200ma, r gen = 25? t (off) turn-off time - - 20 v sd diode forward voltage drop - 1.2 - v v gs = 0v, i sd = 200ma t rr reverse recovery time - 400 - ns v gs = 0v, i sd = 800ma notes: 1. all d.c. parameters 100% tested at 25 o c unless otherwise stated. (pulse test: 300s pulse, 2% duty cycle.) 2. all a.c. parameters sample tested. switching waveforms and test circuit thermal characteristics package i d (continuous) ? i d (pulsed) power dissipation @t a = 25 o c i dr ? i drm to-236ab 115ma 800ma 0.36w 115ma 800ma notes: ? i d (continuous) is limited by max rated t j . 90% 10% 90% 90% 10% 10% pulse generator vdd r l output d.u.t. t (on) t d(on) t (off) t d(off) t r input input output 10v vdd r gen 0v 0v t f supertex inc. www .supertex.com
3 2n7002 doc.# dsfp-2n7002 c062813 typical performance curves 2.0 1.6 1.2 0.8 0.4 0 0.1 1.0 10 100 1.0 0.1 0.01 0.001 1.0 0.8 0.6 0.4 0.2 0 0.001 0.01 0.1 1.0 10 0.5 0.4 0.3 0.2 0.1 0 0 0.2 0.4 0.6 0.8 10 0 25 50 75 100 125 150 sot-23 t a = 25 o c p d = 0.36w sot-23 t a = -55 o c t a = 25 o c v ds = 25v 0 10 20 30 40 50 4v 3v 0 2 4 6 8 10 25 o c 125 o c 7v 9v 8v 6v 5v 4v 3v 7v 9v 8v 6v 5v sot-23 (dc) sot-23 (pulsed) v gs = 10v saturation characteristic s maximum rated safe operating area thermal response characteristics thermal resistance (normalized) transconductance vs. drain current power dissipation vs. case t emperatur e output characteristics i d (amperes) v ds (volts) g fs (seimens ) p d (watts) t c ( o c) i d (amperes) v ds (volts) t p (seconds) i d (amperes) v ds (volts) i d (amperes) v gs = 10v 2.0 1.6 1.2 0.8 0.4 0 0.5 0.4 0.3 0.2 0.1 0 supertex inc. www .supertex.com
4 2n7002 doc.# dsfp-2n7002 c062813 typical performance curves (cont.) 50 25 0 0 10 20 30 40 0 2 4 6 8 10 2.0 1.6 1.2 0.8 0.4 0 -50 0 50 100 150 1.1 1.0 0.9 10 8 6 4 2 0 1.4 1.2 1.0 0.8 0.6 10 8 6 4 2 0 0 0.2 0.4 0.6 0.8 1.0 30 pf v ds = 40v v ds = 10v v gs = 5.0v t a = - 55 o c v ds = 25v 125 o c 0 0.5 1.0 1.5 2.0 2. 5 f = 1.0mhz c iss c os s c rss 90 pf 2.0 1.6 1.2 0.8 0.4 0 v gs(th) @ 1.0ma 25 o c r ds(on) @ 10v, 0.5a gate drive dynamic characteristic s q g (nanocoulombs) v gs(th) (normalized) r ds(on) (normalized ) v (th) and r ds variation with temperatur e on-resistance vs. drain curren t bv dss variation with temperatur e bv dss (normalized ) transfer characteristics capacitance vs. drain-to-source voltage c (picofarads ) i d (amperes) t j ( o c) r dss(on) (ohms) i d (amperes ) v gs (volts) v ds (volts) v gs (volts) t j ( o c) v gs = 10v -50 0 50 100 15 0 supertex inc. www .supertex.com
5 (the package drawing(s) in this data sheet may not refect the most current specifcations. for the latest package outline information go to http://www.supertex.com/packaging.html .) doc.# dsfp-2n7002 c062813 2n7002 3-lead to-236ab (sot-23) package outline (k1) 2.90x1.30mm body, 1.12mm height (max), 1.90mm pitch symbol a a1 a2 b d e e1 e e1 l l1 dimension (mm) min 0.89 0.01 0.88 0.30 2.80 2.10 1.20 0.95 bsc 1.90 bsc 0.20 ? 0.54 ref 0 o nom - - 0.95 - 2.90 - 1.30 0.50 - max 1.12 0.10 1.02 0.50 3.04 2.64 1.40 0.60 8 o jedec registration to-236, variation ab, issue h, jan. 1999. ? this dimension differs from the jedec drawing. drawings not to scale. supertex doc.#: dspd-3to236abk1, version c041309. vi ew b vi ew a - a side v iew t op vi ew v iew b gauge plane seating plane 0.25 l1 l e1 e d 3 1 2 e e1 b a a seating plane a a2 a1 supertex inc. does not recommend the use of its products in life support applications, and will not knowingly sell them for use in such appl ications unless it receives an adequate ?product liability indemnification insurance agreement.? supertex inc. does not assume responsibility for use of devices described, and limits its liabilit y to the replacement of the devices determined defective due to workmanship. no responsibility is assumed for possible omissions and inaccuracies. circuitry and specifications are subject to change without notice. for the latest product specifications refer to the supertex inc. (website: http//www .supertex.com) ?2013 supertex inc. all rights reserved. unauthorized use or reproduction is prohibited. supertex inc. 1235 bordeaux drive, sunnyvale, ca 94089 t el: 408-222-8888 www .supertex.com
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